At present, LDO (Low Dropout Regulator) as a power management circuit has been widely used in portable electronic devices, wireless energy transmission systems and other fields. A conventional LDO is a linear circuit, which has the advantages of low output ripple, simple circuit structure, small chip area and the capability of being fully integrated as compared with a switching regulator circuit. But because of its analog circuit characteristics, it has poor process transferability, and is difficult to work at a low voltage. Therefore, the digital LDO structure emerges for this problem. The digital LDO has the characteristics of a digital circuit, with good process transferability, and can work at a very low power supply voltage.
A conventional digital LDO without off-chip capacitors includes a voltage comparator, a counter, a PMOSFET (Metal-Oxide Semiconductor Field Effect Transistor) array, and a feedback resistor network. When the output feedback voltage is less than the reference voltage, the comparator outputs a low level, otherwise, outputs a high level. The counter controls the number of turned-on transistors in the PMOSFET array according to an output value of the comparator, thereby to adjust the output voltage and ultimately achieve the purpose of stable output voltage.